Browse Prior Art Database

Input/Output Channel Status Handling Mechanism

IP.com Disclosure Number: IPCOM000086660D
Original Publication Date: 1976-Oct-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 4 page(s) / 85K

Publishing Venue

IBM

Related People

Boggs, JK: AUTHOR [+2]

Abstract

This mechanism provides more efficient status handling in an input/output (I/O) channel. It enables improved channel utilization and improved system throughput by reducing the software overhead required in handling presentation of interrupts to the processor by the I/O channel.

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Input/Output Channel Status Handling Mechanism

This mechanism provides more efficient status handling in an input/output (I/O) channel. It enables improved channel utilization and improved system throughput by reducing the software overhead required in handling presentation of interrupts to the processor by the I/O channel.

This status-handling mechanism distinguishes between primary status messages and secondary status messages from the I/O control units. As used herein, a "primary status" message is a Channel End status message occurring at the end of a channel command word (CCW) sequence. This Channel End condition may or may not coincide with the Device End condition. All other control unit status messages are considered as secondary status messages. An example of a secondary status message is a Device End status message occurring after and apart from the Channel End status message.

This status-handling mechanism enables all primary status messages to be accepted by the channel unit when and as they are presented by the control units. There is no stacking of primary status messages at the device control unit. The mechanism also enables secondary status messages to be presented once and, if not accepted, to be stacked once. After being stacked once, the control unit is prevented from initiating another Request-In for the secondary status. Subsequent acceptance of the stacked secondary status messages, can only be accomplished by issuance of a Test I/O (TIO) instruction by the channel.

The following primary features are included in this mechanism:
(1) A status-interrupt buffer mechanism which provides a separate interrupt buffer for each I/O subchannel;
(2) A status-interrupt queuing mechanism which queues the pending subchannel status interrupts in a first-in-first-out manner; and
(3) A channel hardware mechanism which controls the presentation of status-interrupt requests to the processor.

With reference to Fig. 1, the status-interrupt buffer mechanism includes a set of subchannel status buffers 10 located in channel control storage 11 and a microcode routine located in control storage 12 for controlling the use of the subchannel status buffers 10. At the end of the data transfer portion of an I/O data transfer type operation, a control unit 13 will present a Channel End status message on I/O interface cable 14. If the channel is unavailable to accept this primary status message, it will, nevertheless, be supplied by way of channel hardware 15 and processor data flow hardware 16 to the proper one of the subchannel status buffers 10. The channel hardware 15 then signals the control unit 13 that status has been accepted. Thus, there is no stacking of primary status messages at the device control unit 13 and no tying up of the channel to await acceptance of primary status.

The status-interrupt queuing mechanism includes a status interrupt queue 17 located in channel control storage 11 and a microcode routine located in control st...