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Sense Latch and Off Chip Driver Including a Booster Circuit

IP.com Disclosure Number: IPCOM000086724D
Original Publication Date: 1976-Oct-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 60K

Publishing Venue

IBM

Related People

Gladstein, LA: AUTHOR [+3]

Abstract

A charge pump serves as a booster circuit to reduce the number of devices in the circuit, lower power requirements and increase switching speed.

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Sense Latch and Off Chip Driver Including a Booster Circuit

A charge pump serves as a booster circuit to reduce the number of devices in the circuit, lower power requirements and increase switching speed.

Variable capacitor C (Fig. 1) serves as a charge pump to the sense signal appearing at node N1. The variable capacitor C is included in the structure of device D4 which includes gate, source and drain electrodes defined by nodes N1, N2 and N3, respectively. Clock 2 is directly connected to N3 and to N1 through variable capacitor C.

Fig. 2 shows the structure of D4. Gate insulation 20 for D4 extends beyond drain N3 to form variable capacitor C in conjunction with gate metallization 22. Positive voltages at N1 provide inversion under the oxide beyond drain N3. The inversion supplements the capacitance between N1 and N3. With N1 at ground potential, there is no inversion under the extended oxide and almost no capacitance across nodes N1 and N3.

The operation of Fig. 1 will be described in conjunction with Fig. 3. At time T(0), node N1 is charged to a threshold below clock 1 voltage. The input signal is pulled to a down level via D1. The output is at a down or up level depending upon the state of output latch D7, D8, D9 and D10. A reset pulse at time T1 causes reset of the output latch which turns off D12. An up level is provided at the output. An up input level at T2 causes variable capacitor C to be discharged via D3 which pulls down N1 and turns off D4. When cloc...