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Method of Forming Poly Si Pattern With Tapered Edge

IP.com Disclosure Number: IPCOM000086869D
Original Publication Date: 1976-Nov-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 69K

Publishing Venue

IBM

Related People

Tsang, PJ: AUTHOR

Abstract

Polycrystalline silicon (poly-si) is used as a field plate, and/or as the first-layer interconnection lines in integrated circuit (IC) fabrication, for example, a bit line of a dynamic metal-oxide semiconductor (MOS) memory. In these applications, the tapered edge of the poly-si pattern is desired to improve the edge coverage of the overlay material whether it be a passivation insulator or a conduction metallurgy layer. In the specific case of using poly-si as a capacitor charging plate in the dynamic one-device cell MOS memory IC, for example, where post poly-si oxidation is required to convert the poly-si surface into a layer of SiO(2), experience has shown that a tapered edge will lessen the tendency of oxide undergrowth around the pattern's edge.

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Method of Forming Poly Si Pattern With Tapered Edge

Polycrystalline silicon (poly-si) is used as a field plate, and/or as the first- layer interconnection lines in integrated circuit (IC) fabrication, for example, a bit line of a dynamic metal-oxide semiconductor (MOS) memory. In these applications, the tapered edge of the poly-si pattern is desired to improve the edge coverage of the overlay material whether it be a passivation insulator or a conduction metallurgy layer. In the specific case of using poly-si as a capacitor charging plate in the dynamic one-device cell MOS memory IC, for example, where post poly-si oxidation is required to convert the poly-si surface into a layer of SiO(2), experience has shown that a tapered edge will lessen the tendency of oxide undergrowth around the pattern's edge. However, by the conventional wet etching, sharp vertical sidewalls are, in general, formed.

The following method allows the achievement of a poly-si pattern with tapered edges. The photoresist pattern 4 is formed by a conventional method which has sharp vertical edges (Fig. 1) on a poly-si layer 5 which covers, in turn, silicon dioxide layer 6 and silicon substrate 7. The photoresist pattern is then subjected to a high temperature post-bake to cause edge-rounding (Fig. 2). The temperature may be, for example, 140 degrees C and for 30 minutes in nitrogen gas. The reactive ion-etching method is then used to form the poly-si pattern, which has tapered edges, as shown...