Browse Prior Art Database

Integrity Testing

IP.com Disclosure Number: IPCOM000086942D
Original Publication Date: 1976-Nov-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 20K

Publishing Venue

IBM

Related People

Kirkman, DH: AUTHOR

Abstract

The integrity of via connections, in, for example, a multilayer ceramic panel 1, between pins 2 or solder pads 3 and chip "footprints" 4, is tested by immersing the footprints 4 in a electrochromic liquid 5, e.g., heptyl viologen providing a counter electrode 6 and driving the input connections simultaneously.

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Integrity Testing

The integrity of via connections, in, for example, a multilayer ceramic panel 1, between pins 2 or solder pads 3 and chip "footprints" 4, is tested by immersing the footprints 4 in a electrochromic liquid 5, e.g., heptyl viologen providing a counter electrode 6 and driving the input connections simultaneously.

Where the connections are good, a readily detectable colored deposit forms on the footprints 4, so that faulty connections can be detected visually. The deposit is erased by reversing the current.

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