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Integrated Vertical Triac Switching Structure

IP.com Disclosure Number: IPCOM000086977D
Original Publication Date: 1976-Nov-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Feth, GC: AUTHOR [+2]

Abstract

A vertical triac structure can be made with planar semiconductor techniques and, particularly, when combined with some of the basic processes used in the Harris dielectric structure described in reference [*].

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Integrated Vertical Triac Switching Structure

A vertical triac structure can be made with planar semiconductor techniques and, particularly, when combined with some of the basic processes used in the Harris dielectric structure described in reference [*].

The basic cross-section is shown in Fig. 1. (An equivalent structure can be made with p and n materials reversed.) Initially, an n-substrate is thinned, and a p epitaxial layer is grown. The V-shaped moats are then formed and filled with polysilicon, as in the Harris process. The upper p region is then made by standard diffusion processes, and, subsequently, the triac n+ region (and, optionally, the p+ connection areas) are formed.

The nature of the triac device operation permits shorting the entire bottom surface. Combined in a circuit, such as a many-position switch or a line concentrator, an entire array of triac devices can be integrated with the bottom side of all the triac devices bonded to a single electrical connection. This forms the common electrode connection of the switch or concentration components (Fig. 2). Thus, a simple and inexpensive "planar-device" packaging arrangement is possible. The upper electrode (and gating electrodes not shown in the cross section) can be connected by conventional interconnect techniques.
[*] T. J. Sanders and W. R. Morcom, "Polysilicon-filled Notch

Produces Flat, Well-isolated Bipolar Memory", Electronics,

April 12, 1973.

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