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Browse Prior Art Database

Consistency of Changes on PL I Control Programs

IP.com Disclosure Number: IPCOM000087011D
Original Publication Date: 1976-Nov-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 5 page(s) / 29K

Publishing Venue

IBM

Related People

Roth, JP: AUTHOR

Abstract

A change in a program has the purpose, in general, to modify the behavior of a part of the program. Much of the program, however, should not change in function by this change. Described below is a method for determining the consistency of the program undergoing change; it is geared strictly for PL/I control programs.

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Consistency of Changes on PL I Control Programs

A change in a program has the purpose, in general, to modify the behavior of a part of the program. Much of the program, however, should not change in function by this change. Described below is a method for determining the consistency of the program undergoing change; it is geared strictly for PL/I control programs.

This method consists, first, of a program RTRAN [1] which converts software to hardware. RTRAN is used for translating PL/R, a subset of PL/I, into RLD (Regular Logic Design), a hardware language [2]. The RTRAN output is then verified against a manual implementation using the verification program VERIFY
[2].

In the application described here, however, a program, the D-algorithm [1] suitably updated, will verify the consistency of changes made in any given program. It will determine for PL/I control programs precisely which functions are changed by the changes themselves in a most efficient manner. The D-algorithm was originally designed to compute tests to detect failures in logic. In this application it will be used to detect functional changes.

RTRAN [3] is a program for converting high-level programs to an equivalent hardware implementation. It runs on PL/R, a variant, and originally a subset of PL/I. To give the flavor of RTRAN, we shall indicate how a few powerful instructions are rendered. An IF-THEN-ELSE such as

If A then y=F(x);

else y=G(x);

end; would be rendered

y=A&F(x) 3 ª A&G(x)

A :DO statement: DO I=0 to N;

y=H(I);

end; would translate as y=H(0); y=H(1); ...; y= H(N);.

To discuss a DO WHILE statement, it is necessary, first, to discuss the RLD
[2] method of rendering recursive functions. In RLD any variable in a computation has a certain value. In addition after a "cycle time", it has a "next" or future value. This "double-valuedness" is handled in RLD by having two registers, for each such variable, of the appropriate number of bits. The present state, i.e., register representing it, is called the Master Register; the other, the "next", the Slave Register.

If v is a variable whose next value v' is expressed by

v' = F(v,w); where w comprises a set of values of other variables, then in hardware there would be a box for F, the function being fed by v and w Registers and feeding v', as shown below:

(Image Omitted)

1

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Then in a DO WHILE statement, use will be made to design it in hardware of these present and future values of a variable.

The VERIFICATION problem considered here is that of verification of CHANGES in the Program. The process by which this is done is fairly complicated and uses a generalization of the D-algorithm itself. Thus it shall be described in some detail.

Imagine that we have an RLD which defines a hardware realization of some PL/I program. [2] Suppose that a change in this program was made. In this implementation, the RLD must also change. Such a change necessarily involves change in the external function of the Program. There...