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Ring Counter Checking Circuits

IP.com Disclosure Number: IPCOM000087048D
Original Publication Date: 1976-Dec-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Dunn, EC: AUTHOR [+2]

Abstract

A ring counter is used for counting an even number of counts N or an odd number of counts N-k. Switch S may be actuated to bypass the more significant digit positions for actuating the ring counter to count to an odd number smaller than the larger even number N. The illustrated circuit detects setting errors (more than one binary one in the ring counter) and shift errors (for example, a stage may be stuck to a "one").

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Ring Counter Checking Circuits

A ring counter is used for counting an even number of counts N or an odd number of counts N-k. Switch S may be actuated to bypass the more significant digit positions for actuating the ring counter to count to an odd number smaller than the larger even number N. The illustrated circuit detects setting errors (more than one binary one in the ring counter) and shift errors (for example, a stage may be stuck to a "one").

Referring to the figure, a first trigger (BIT) is triggered between alternate states by the timing clock which also shifts the ring counter in a circular fashion. The signal state of the BIT trigger indicates that the count is in an odd-numbered or an even-numbered stage. The BIT trigger supplies activating signals to the four AND-OR (AO) circuits, which also receive information whether the ring counter is in an odd stage via the odd OR circuit or in an even stage via the even OR circuit. AND circuit A] compares an indication from the odd OR circuit with an odd indication from the BIT trigger to supply a signal to AND circuit A5. Similarly, A3 responds to the opposite state of the BIT trigger and the output from the even OR circuit to supply a signal to A5. The exclusive OR circuit responds to both the odd and even OR circuit outputs to supply an ERROR signal. If two binary ones are in the ring counter in successive stages, the exclusive OR circuit is degated, removing the ERROR signal. The above circuits operate for an even number of stages in the ring counter.

When switch S is closed to select an odd...