Browse Prior Art Database

Dynamic Monitoring System for Microprocessor Engines

IP.com Disclosure Number: IPCOM000087102D
Original Publication Date: 1976-Dec-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 3 page(s) / 39K

Publishing Venue

IBM

Related People

Galli, EJ: AUTHOR

Abstract

This system provides a mechanism in a microprocessor engine to allow dynamic monitoring of engine state changes under flexible external or program control without degrading normal engine performance.

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Dynamic Monitoring System for Microprocessor Engines

This system provides a mechanism in a microprocessor engine to allow dynamic monitoring of engine state changes under flexible external or program control without degrading normal engine performance.

Referring to the figure, a monitor/test adapter 1 is attached to the microprocessor engine 2 via the engine's I/O interface 3. The engine contains, in addition to its normal functions, the additional monitor logic functions of: (1) monitor mode register 4 (1 bit), (2) monitor code register 5 (8 bits), and (3) monitor condition recognition logic 6. Associated with the operation of the monitor mode register 4 are control instructions which allow setting and resetting it, and a set monitor line 7 from the adapter which can also control the state of this register. The monitor mode register 4 controls the monitoring operation in the engine. It can be set/reset externally by the monitor adapter (by the set monitor line 7) or by a control program operating in the engine. It is also reset automatically under certain conditions (e.g., system reset).

The monitor condition recognition logic recognizes a set of internal engine change-state conditions and logically OR's these conditions together to form a monitor alert signal on line 8. These conditions include: (1) Execution of certain control instructions. (2) Any change of state which involves a program status word swap. (3) The occurrence of a machine check/program check condition. (4) The occurrence of `wait state'. (5) Execution of branch/jump instruction (taken).
(6) Execution of branch/jump instruction (not taken). (7) Other conditions of special interest.

After the operation associated with the state change is completed, the activation of the monitor alert signal internally in the engine will cause the following action: If the monitor code register 5...