Browse Prior Art Database

Driver Using Unity Gain Design in Active Stage

IP.com Disclosure Number: IPCOM000087238D
Original Publication Date: 1976-Nov-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Pi, SC: AUTHOR [+2]

Abstract

As integrated circuit field-effect transistor (FET) drivers are called upon to switch at increased speeds and drive large networks, device size and power dissipation become substantial. In those applications where the output is sampled during a predictable time A, the driver need only be active during those sampling times, and may be operated in a unity-gain mode during other times to conserve power.

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Driver Using Unity Gain Design in Active Stage

As integrated circuit field-effect transistor (FET) drivers are called upon to switch at increased speeds and drive large networks, device size and power dissipation become substantial. In those applications where the output is sampled during a predictable time A, the driver need only be active during those sampling times, and may be operated in a unity-gain mode during other times to conserve power.

The above circuit shows such a driver having two depletion-mode devices 11 and 13 and enhancement-mode devices 15 and 21. The circuit operates as follows. During sample time A, the input signal is connected to push/pull output transistors 11 and 15 via gate FETs 17 and 19 and inverter switch FET 21. During the nonsampling time period A, the output current is reduced to substantially zero by conduction of FETs 23 and 25, which place the output voltage at the driver's unity-gain point which may be approximately 1 to 1.7 volts.

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