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Time Dependent Input Processing using a PLA

IP.com Disclosure Number: IPCOM000087337D
Original Publication Date: 1977-Jan-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Ward, HT: AUTHOR

Abstract

Multiplexing inputs to a programmed logic array (PLA), as a function of time, can improve the efficiency of operation within the PLA, and can also minimize the number of signal lines required to carry these inputs from one location to another. For example, if the PLA configuration has 56 input/output pins which can be flexibly distributed between inputs and outputs, certain operations may require a large number of outputs, which would leave relatively few pins for input data. The total number of inputs to be processed during a complete time cycle might be many more than the input pins available. However, in most cases these inputs can be segregated into time-dependent groups, suitably selected and inputted as required to the few available input pins of the PLA.

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Time Dependent Input Processing using a PLA

Multiplexing inputs to a programmed logic array (PLA), as a function of time, can improve the efficiency of operation within the PLA, and can also minimize the number of signal lines required to carry these inputs from one location to another. For example, if the PLA configuration has 56 input/output pins which can be flexibly distributed between inputs and outputs, certain operations may require a large number of outputs, which would leave relatively few pins for input data.

The total number of inputs to be processed during a complete time cycle might be many more than the input pins available. However, in most cases these inputs can be segregated into time-dependent groups, suitably selected and inputted as required to the few available input pins of the PLA.

Assuming a method for time multiplexed inputs has been provided, an input selector sequence counter can be implemented within the PLA, as shown in Fig. 1, or externally with counter outputs to the PLA, as shown in Fig. 2. The counter would be synchronized with each group of multiplexed inputs and decoded within the PLA to direct each input group to its proper functions within the PLA. Implementation of these methods could be as shown in the attached figures. With this basic approach, more word lines can be utilized, and, therefore, more functions can be performed by the PLA.

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