Original Publication Date: 1977-Jan-01
Included in the Prior Art Database: 2005-Mar-03
Perris, J: AUTHOR [+2]
AbstractThis is a current-injection logic circuit providing low power, high speed, and compact layout in integrated form.
This is a current-injection logic circuit providing low power, high speed, and compact layout in integrated form.
The figure illustrates a circuit fabricated with separately isolated PNP and NPN devices for performing the binary logic functions of OR and NOR. Unlike MTL and I/2/L circuits, the current-injection logic gate utilizes standard high beta NPN devices, thus providing higher gate speeds than can be achieved with MTL or I/2/L.
In the illustrated four input configuration, NPN transistors 10, 12, 14 and 16 are Schottky-diode clamped and receive inputs at terminals A, B, C and D, respectively. The emitters are connected in common to ground potential while the collectors are connected in common providing the NOR output function. Output transistor 18, which is also of the NPN type, has its base/collector clamped by a Schottky barrier diode and inverts the NOR logic function to provide the OR logic output.
The current source is provided by multiemitter/multicollector PNP transistor 20 which has an adjustable current output determined by the voltage divider including diode D1 and resistors R1, R2 and R3. Additionally, receiver and driver circuits can be used in conjunction with the illustrated OR/NOR gate to provide any desired input/output levels.