Browse Prior Art Database

Fusible Link Device

IP.com Disclosure Number: IPCOM000087383D
Original Publication Date: 1977-Jan-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Ewald, L: AUTHOR [+3]

Abstract

Fusible links are programmable circuit interconnections needed, for example, in LSI circuit concepts for purposes of logic personalization, activation of redundancy, etc. The proposed fusible link comprises a semiconductor structure which is disclosed in greater detail in U. S. Patent 3,787,717 as an overvoltage protective device. In comparison with fuses used at present, such a device has the advantage that it can be programmed without destroying a superimposed passivation layer. It has the further advantage that the amount of heat developed is so low that it does not affect immediately adjacent devices.

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Fusible Link Device

Fusible links are programmable circuit interconnections needed, for example, in LSI circuit concepts for purposes of logic personalization, activation of redundancy, etc. The proposed fusible link comprises a semiconductor structure which is disclosed in greater detail in U. S. Patent 3,787,717 as an overvoltage protective device. In comparison with fuses used at present, such a device has the advantage that it can be programmed without destroying a superimposed passivation layer. It has the further advantage that the amount of heat developed is so low that it does not affect immediately adjacent devices.

The fusible link device makes use of a failure mechanism observed on protective devices, which, under certain conditions, leads to substrate shorts. If gated junction 11 (Fig. 1) breaks down in a small zone, lateral NPN transistor action may be confined to a very narrow current path. Power dissipation in the order of 100 mW is then confined to a spot of only a few Mu in diameter. The resulting heat causes permanent damage to the junction and/or short to gate 12 consisting of a metal, such as A1 or/and conductive (poly-)silicon. In the fusible link device, this effect is induced intentionally by making region 10 very narrow. The breakdown of collector junction 11 is confined to the respective junction area under gate 12. The gate can also be negatively biased with respect to substrate 4, so that the breakdown voltage is reduced to values which...