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Reactive Ion Etch Cleaning of Silicon

IP.com Disclosure Number: IPCOM000087541D
Original Publication Date: 1977-Feb-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Bondur, JA: AUTHOR [+2]

Abstract

Additional charge buildup during wafer cleaning in the fabrication of semiconductor devices is avoided by the use of a diode configured, reactive etching process just prior to metallization. Resist residues which remain after development of electron-beam exposed resists are removed.

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Reactive Ion Etch Cleaning of Silicon

Additional charge buildup during wafer cleaning in the fabrication of semiconductor devices is avoided by the use of a diode configured, reactive etching process just prior to metallization. Resist residues which remain after development of electron-beam exposed resists are removed.

The wafer is placed in a modified high vacuum diode etching system with an operating cycle of 0.1 watts/cm/2/ at 13.56 MHz for one minute at 200 microns of oxygen pressure. The process has a beneficial effect on the adhesion properties of the metallization and on contact resistance, and avoids permanent changes in flatband and threshold voltages due to radiation effects.

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