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Browse Prior Art Database

Wafer Test System

IP.com Disclosure Number: IPCOM000087550D
Original Publication Date: 1977-Feb-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 70K

Publishing Venue

IBM

Related People

Forslund, DC: AUTHOR [+3]

Abstract

This is a wafer test system in which a process-control computer supports a plurality of computer-controlled testers and wafer test stations.

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Wafer Test System

This is a wafer test system in which a process-control computer supports a plurality of computer-controlled testers and wafer test stations.

As shown in Fig. 1, the computer,such as an IBM System/7, controls a pair of computer-controlled testers, such as the Fairchild 5000 C series. Each tester in turn controls a pair of test stations which include a stepper system and the wafer probes. More testers and test stations can be supported. The system is interrupt-driven and all operations are asynchronous, and many of the operations are overlapped and interleaved.

The display keyboard, in combination with the test station controls, provides the necessary communication between the operator and the system to control the test and display the results. Test programs may be generated externally and are entered into the system through the card I/O. The printer is available for hard copy of the results of the analysis, as well as for the preparation of the test program.

Fig. 2 is a schematic of the basic regions of software which control the system.

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