Browse Prior Art Database

Generating Thermal Nucleation Sites on Semiconductor Devices

IP.com Disclosure Number: IPCOM000087715D
Original Publication Date: 1977-Mar-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Frieser, RG: AUTHOR [+3]

Abstract

In liquid-cooled semiconductor device packages, the device is immersed in a coolant fluid, typically perfluorohexane. On occasion, it has been found that the devices ostensibly cooled in the fluid have reached excess temperatures during operation because of a lack of nucleation sites for boiling on the exposed surface of the device. Various techniques for roughening the back side of the device have been proposed. However, with these techniques there is the danger that the treatment of the device will produce defects that could propagate through the device and impair the operation thereof.

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Generating Thermal Nucleation Sites on Semiconductor Devices

In liquid-cooled semiconductor device packages, the device is immersed in a coolant fluid, typically perfluorohexane. On occasion, it has been found that the devices ostensibly cooled in the fluid have reached excess temperatures during operation because of a lack of nucleation sites for boiling on the exposed surface of the device. Various techniques for roughening the back side of the device have been proposed. However, with these techniques there is the danger that the treatment of the device will produce defects that could propagate through the device and impair the operation thereof.

In this process after the device structure is complete, a gold/silicon eutectic layer is formed on the back side of the device.

The layer can be formed by evaporating a gold layer on the silicon surface and heating to 400 Degrees C. The resultant gold/silicon eutectic layer shows pure gold striations or laminar inclusions running into the silicon from the surface. In order to generate the useful surface for thermal nucleation, it is then necessary to etch the pure gold domains in the eutectic layer. This is accomplished by using a KI/I(2) etch at room temperature. While the etching can be done anytime, it appears particularly advantageous to wait until the device is finished and mounted before performing this operation. This etch only removes gold, but does not affect the silicon or other surfaces on the device.

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