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Voltage Reference Circuit

IP.com Disclosure Number: IPCOM000087731D
Original Publication Date: 1977-Mar-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Denis, B: AUTHOR [+3]

Abstract

This circuit is used to fix the bit line potential in a memory cell not shown). It allows a voltage reference REF1 to be obtained on a bit line.

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Voltage Reference Circuit

This circuit is used to fix the bit line potential in a memory cell not shown). It allows a voltage reference REF1 to be obtained on a bit line.

In the standby mode, REF1 assumes the value VS. The cathode of diode D1 is at -1.5 volts, and D1 is clamped (Vb ~ -1.5 volts). Transistors T1 and T2 are on, and transistor T4 is off, since its base assumes a low level when T1 is turned on (Ve ~ -4.5 volts). Transistor T3 is on, and the output REF1 is clamped at the value Ve + Vce (T2) + R4+R5/R5 Vbe by clamping circuit T3, R4, R5.

During a write or read cycle, REF1 assumes the high level VR. The input is at -4 volts and diode D1 is turned on. Then, transistors T1 and T2 are cut off, as well as transistor T3. Transistor T4 raises the level of REF1 to V1 = Vb - Vbe (T4) until transistor T4 is cut off. The level of REF1 will then be balanced at value VR = Vb - R6/R6+R7 (Vb-Ve).

Level REF1 is applied to the bit lines of the cell through coupling diodes D2 and D3.

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