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Single Error Correcting and Double Error Detecting Block Codes for DOPSK Channels

IP.com Disclosure Number: IPCOM000087746D
Original Publication Date: 1977-Mar-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 3 page(s) / 23K

Publishing Venue

IBM

Related People

Chen, CL: AUTHOR [+2]

Abstract

In a differentially encoded quadri-phase-shift keying (DQPSK) modulation system, a single channel error results in a 2-bit error in the received binary sequence.

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Single Error Correcting and Double Error Detecting Block Codes for DOPSK Channels

In a differentially encoded quadri-phase-shift keying (DQPSK) modulation system, a single channel error results in a 2-bit error in the received binary sequence.

This describes a block coding technique for the correction of a single channel error in a DQPSK channel. The length of the binary linear block codes constructed is a multiple of 4 and is less than or equal to 2/r/-4 for r parity check bits.

Let D be an r x n matrix where n is a multiple of 4, i.e., n=4m, and m is an integer. Define an n x n matrix.

(Image Omitted)

The binary code defined by the parity matrix of (2) is a single error correcting (SEC) code for a DQPSK system if the following conditions are satisfied: a) n less than or equal to 2/r/-4 b) The columns of D are distinct, and

To show that such a code exists we consider the matrix D with the i-th column D(i) defined by the binary representation in r-tuple of the integer i + 3, i = 1,3,....,n. The code constructed by this particular to yield n < 2/r/-4 by deleting some columns of D.

The SEC code defined in (2) has n-r data bits and r parity check bits if the rank of H is r. In this case the positions corresponding to a set of r linearly independent columns can be assigned as parity check positions.

Define symbol parities T(i) of the received code word R=R (1,2,....,4m) as follows:

(Image Omitted)

where R'(i) is the i-the received bit in the next code word.

The error correction procedure for the SEC can be described as follows:
1) Calculate the syndrome S=H . R/t/
2) If S is zero, there is no error. If S is nonzero, match

S with D.
3) Let Q(i) be 1 if S matches D(i). For 0 less than or = i less than or = m-1, the error positions are at: i) bits 4i+1 and 4i+3, if...