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Test Structure for Measurement of Thick Oxide Threshold

IP.com Disclosure Number: IPCOM000087753D
Original Publication Date: 1977-Mar-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 45K

Publishing Venue

IBM

Related People

Evrenidis, P: AUTHOR [+2]

Abstract

A determination of the threshold voltage for a thick-oxide ungated device of the field-effect transistor (FET) type is simplified by the structure shown above. The device (Figs. 1 and 2) consists of a common source deposition S in a semiconductor substrate and two parallel drain depositions D1 and D2. A thick layer of silicon dioxide is deposited over the depositions S, D1 and D2 to form two thick oxide FET devices with identical geometry. Conductive connections M1, M2 and M3 are made to the depositions D1, S, and D2, respectively, and a metallic gate G is made overlapping the space between S and D1. Gate G is used to determine the conduction threshold voltage as a function of substrate voltage. A glassy layer Q of sputtered quartz is applied over the substrate to seal it.

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Test Structure for Measurement of Thick Oxide Threshold

A determination of the threshold voltage for a thick-oxide ungated device of the field-effect transistor (FET) type is simplified by the structure shown above. The device (Figs. 1 and 2) consists of a common source deposition S in a semiconductor substrate and two parallel drain depositions D1 and D2. A thick layer of silicon dioxide is deposited over the depositions S, D1 and D2 to form two thick oxide FET devices with identical geometry. Conductive connections M1, M2 and M3 are made to the depositions D1, S, and D2, respectively, and a metallic gate G is made overlapping the space between S and D1. Gate G is used to determine the conduction threshold voltage as a function of substrate voltage. A glassy layer Q of sputtered quartz is applied over the substrate to seal it. This test structure allows the examination of the quality of a thick oxide after a glass coat. It can be used to identify any difference in parasitic elements between gated and ungated devices, and, finally, it makes it possible to express QEFF problems in well-defined, thick-oxide FET device threshold voltage terms.

In use, the device is connected in a circuit (Fig. 3), and a comparison of the two drain currents I(D1) and I(D2) will show if there is any difference between the gated and ungated FET devices. If there is any channel current through drain D2, then the voltage source V(G) connected to gate G is adjusted so that the current- dr...