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End to End Monitor for Interface Level Converter Circuits

IP.com Disclosure Number: IPCOM000087757D
Original Publication Date: 1977-Mar-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Coburn, RL: AUTHOR

Abstract

The circuit illustrated in the drawing is suitable for checking the proper operation of a level converter like that conventionally used in preparing a signal for application to an external modem for subsequent transmission.

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End to End Monitor for Interface Level Converter Circuits

The circuit illustrated in the drawing is suitable for checking the proper operation of a level converter like that conventionally used in preparing a signal for application to an external modem for subsequent transmission.

The input signal to the converter is also applied to one input of an exclusive OR circuit. The output signal of the level converter is applied to a voltage divider network, and a trigger circuit connected to the common junction of the two resistors, comprising the voltage divider network, provides the other input for the exclusive OR circuit. The threshold of the trigger circuit can be adjusted so that the output of the level converter circuit must reach a required minimum level. The output of the exclusive OR circuit is applied via an OR circuit and a delay circuit to set an error latch, which indicates error in the event the exclusive OR provides an output which indicates that the input and output of the level circuit are not as required. The delay is necessary to allow for propagation delay of the test and tested circuitry. The error latch once set must be reset by external equipment. The delay circuits and the error latch may be used to test a number of level converters, as indicated by the dashed lines.

One of the primary advantages of this circuit is that it can continuously monitor the inputs and outputs of a number of level devices and provide an indication in the event that the...