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Addressing Technique for Real Virtual Storage Programs

IP.com Disclosure Number: IPCOM000087799D
Original Publication Date: 1977-Mar-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Halliwell, H: AUTHOR [+2]

Abstract

This article describes a technique by which a single program can be compiled into two versions (a) to run in a large virtual region using system paging and (b) to run in a real region size and take responsibility for its own paging.

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Addressing Technique for Real Virtual Storage Programs

This article describes a technique by which a single program can be compiled into two versions (a) to run in a large virtual region using system paging and (b) to run in a real region size and take responsibility for its own paging.

The description is of a PL/1 implementation of the technique, but could be applicable to other programming languages. The program is written in such a way that the two versions can be produced by a preprocessor. It is assumed that the program to use this technique works with a large data structure. a) the data structure is in a large AREA. Items are connected by OFFSETS within this AREA. b) the data structure is in a number of smaller AREAs which are ordered; in general, not all will be in main storage simultaneously. The connection between items will be an OFFSET from the start of the first AREA, as if the AREAs were in main storage in order. This can be calculated from the index number of the AREA containing the item and the OFFSET within that AREA. (This depends on the PL/1 implementation.) @PTR Macro Whenever the program addresses items in the data structure using these offsets, it does so in the form of a macro, @PTR (offset name) 0 -> X becomes @PTR(0) -> X BASED(0) becomes BASED(@PTR(0)) The expansion of the macro takes the two forms a) @PTR(0) expands simply to PTR(0, AREA), where PTR is a built-in language function returning pointer. b) @FTR(0) expands to $PTR(0), where S...