Browse Prior Art Database

Polysilicon Techniques for Improving Bipolar MTL

IP.com Disclosure Number: IPCOM000087814D
Original Publication Date: 1977-Mar-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 5 page(s) / 148K

Publishing Venue

IBM

Related People

Jaeger, RC: AUTHOR [+2]

Abstract

In bipolar merged transistor logic (MTL), sometimes also called integrated injection logic (I/2/L), one of the major problems is the wiring limitation when a single level of metallization is used. A second level of metallization requires two additional lithographic masking steps and introduces various topographic and processing problems. This disclosure describes how doped polysilicon may be utilized to obtain a significant improvement in the wirability and layout effectiveness of bipolar MTL circuits. Novel features of the polysilicon MTL technique include the use of polysilicon interconnection lines for underpasses and to provide the collector doping. A method is described for fabricating Schottky decoupling diodes and low sheet resistance polysilicon lines in a single processing step using metallic silicide layers.

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Polysilicon Techniques for Improving Bipolar MTL

In bipolar merged transistor logic (MTL), sometimes also called integrated injection logic (I/2/L), one of the major problems is the wiring limitation when a single level of metallization is used. A second level of metallization requires two additional lithographic masking steps and introduces various topographic and processing problems. This disclosure describes how doped polysilicon may be utilized to obtain a significant improvement in the wirability and layout effectiveness of bipolar MTL circuits. Novel features of the polysilicon MTL technique include the use of polysilicon interconnection lines for underpasses and to provide the collector doping. A method is described for fabricating Schottky decoupling diodes and low sheet resistance polysilicon lines in a single processing step using metallic silicide layers.

A top view of a fragment of an MTL circuit layout is shown in Fig. 1A. Typically, a single level of metallic interconnection is used which results in several wiring problems. First, unless track blockage is allowed, input and output line connections must be made at the ends or edges of an MTL macro. Second, in order to achieve acceptable current distribution across a chip, the PNP injectors are usually metallized over their entire length which unfortunately prevents metal interconnection lines from crossing the injector. A diffused underpass cannot be used because the P-type injector diffusion already exists under the metal. It is important that the injector metallization be continuous because relatively large currents flow in this supply line and only small potential differences can be tolerated between injectors. The use of doped polysilicon regions in the MTL layout alleviates these problems and adds additional advantages as well. Fig. 1B shows a cross section through line bb of Fig. 1A.

Fig. 2 shows how N-type polysilicon interconnection lines may be used for interconnection wiring in an MTL circuit in either the horizontal or vertical direction. Metal lines can cross over the polysilicon to reach input base regions or output collector regions from either the sides or the ends of the MTL macro. Furthermore, polysilicon can cross under the injector metallization, thereby maintaining the continuity of that metallization. In the layout shown, metal lines are required in the vertical direction to connect polysilicon lines to P-type silicon base regions. The N-type bipolar emitter regions, however, can be fabricated using N-type polysilicon as discussed in [1]. A straightforward implementation of the above approach would require numerous poly-silicon-to-metal and metal-to- silicon contacts. The number of contacts can be greatly reduced by using the polysilicon as a diffusion source for forming the N-type collectors of the MTL circuit. With this approach, shallow, lightly doped collectors may be made with the advantage of reduced collector capacitance. Since the polysili...