Browse Prior Art Database

High Density NOR Block

IP.com Disclosure Number: IPCOM000088046D
Original Publication Date: 1977-Apr-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Bode, J: AUTHOR [+2]

Abstract

The high density NOR depicted in Fig. 1 is a medium performance LSI (large-scale integration) circuit. An efficient and very high density cell is achieved by eliminating the need for isolation between the components of the cell.

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High Density NOR Block

The high density NOR depicted in Fig. 1 is a medium performance LSI (large-scale integration) circuit. An efficient and very high density cell is achieved by eliminating the need for isolation between the components of the cell.

Referring to Fig. 2, the cathodes of the saturation clamp, a high forward Schottky diode DS, and the logic low forward Schottky diodes D1-D4, are formed by an N Epi (epitaxial) layer. The N Epi layer also forms the bed of the P resistor and the base of the PNP transistor. The transistor T1 may be fabricated using ion-implant techniques.

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