Browse Prior Art Database

Chip Suitable for Backside Cooling

IP.com Disclosure Number: IPCOM000088048D
Original Publication Date: 1977-Apr-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Berndlmaier, E: AUTHOR [+2]

Abstract

This article concerns an electrical problem connected with the conduction cooling of a semiconductor chip to a heat sink cap by means of a pad, which is preferably an indium dot.

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Chip Suitable for Backside Cooling

This article concerns an electrical problem connected with the conduction cooling of a semiconductor chip to a heat sink cap by means of a pad, which is preferably an indium dot.

With this type of system, illustrated in the figure, module cap 10 sits at the VEE (most negative) supply potential, being connected to VEE module pin 7 through a very low resistance path when dot 3 contacts the backside of the chip
1. Whenever cap 10 is contacted, e.g., by a ground probe, VEE becomes very heavily loaded, which may damage the power supply. The low resistance path is through the P-substrate of chip 1, P+ isolation diffusion 4, chip joint 6, land 5 and module pin 7.

The solution to this problem is to provide a back-biased P/Y junction in the path. A diffusion 9 of a suitable N-type impurity is made into the backside of chip 1 prior to the subcollector diffusion.

The depth of the diffusion preferably exceeds 75 micro-inches and has an approximate Co of greater than 10/20/ atoms per cm/3/.

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