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Variable Radix Shift Counter

IP.com Disclosure Number: IPCOM000088054D
Original Publication Date: 1977-Apr-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Albers, SH: AUTHOR

Abstract

In the processing of instructions of various lengths, timing difficulties can be eased if it is possible to reference specific timings both from the start of an instruction sequence as well as from the end of the sequence. That is, certain basic operations occur during the first few cycles of an instruction sequence and during the final few cycles of the same sequence regardless of the type of instruction being processed or its length.

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Variable Radix Shift Counter

In the processing of instructions of various lengths, timing difficulties can be eased if it is possible to reference specific timings both from the start of an instruction sequence as well as from the end of the sequence. That is, certain basic operations occur during the first few cycles of an instruction sequence and during the final few cycles of the same sequence regardless of the type of instruction being processed or its length.

The closed ring shift register comprising cells C1-C14, shown in the figure, provides output timing signals which occur at the same number of timing cycles as measured from either end of a selectable length instruction sequence. In the example given, a processor is assumed having a set of instructions which are of selectable cycle lengths 6, 8, 10 and 14. The active output of C1 represents the presence of cycle 1, the active output of C2 represents cycle 2, and so forth. Similarly, the active output of C14 represents the last cycle (CN) of the instruction sequence, the active output of C13 represents the next to last cycle (CN-1), and so forth. Input P of shift register cell C11 presets the respective output to "1" active. Input R to cells C7, C9, C11, C12, C13 and C14 reset the respective outputs to "0". Each cell is clocked by the input C.

When the instruction sequence starts, a "1" is shifted into cell C1 and is moved through the shift register to indicate the instruction cycle timing. As the instruction sequence proceeds, the circulating "1" bypasses a selectable number of the cells depending on the number of cycles in the complete instruction sequence. For example, for a six-cycle instruction sequence, the circulating "1" i...