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Predicting Safe Operating Area of Bipolar Transistors

IP.com Disclosure Number: IPCOM000088081D
Original Publication Date: 1977-Apr-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 4 page(s) / 89K

Publishing Venue

IBM

Related People

Gaur, SP: AUTHOR

Abstract

The power-handling capability of bipolar transistors is limited by a failure known as second breakdown. In a switching application, the transistor is in its forward-operating region (I(B) ) 0, V(CE) BV(CEO)) as well as its reverse operating region (I(B) < 0, BV(CEO) < V(CE) < BV(CBO) ). Second breakdown is observed in both forward- and reverse-operating regions. In the forward-operating region, nonuniform temperature and current distributions within the device cause second breakdown failure; in the reverse-operating region, avalanche injection from the collector causes second breakdown failure. Predictive safe operating area (SOA) curves for transistors have been limited in the past to the forward-operating region as obtained by a very simplified one-dimensional analysis of transistors.

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Predicting Safe Operating Area of Bipolar Transistors

The power-handling capability of bipolar transistors is limited by a failure known as second breakdown. In a switching application, the transistor is in its forward-operating region (I(B) ) 0, V(CE) BV(CEO)) as well as its reverse operating region (I(B) < 0, BV(CEO) < V(CE) < BV(CBO) ). Second breakdown is observed in both forward- and reverse-operating regions. In the forward- operating region, nonuniform temperature and current distributions within the device cause second breakdown failure; in the reverse-operating region, avalanche injection from the collector causes second breakdown failure. Predictive safe operating area (SOA) curves for transistors have been limited in the past to the forward-operating region as obtained by a very simplified one- dimensional analysis of transistors.

A computer program can be used to predict SOA for bipolar transistors in forward- and reverse-operating regions using a two-dimensional analysis of transistors. Internal self-heating is taken into account by solving the heat flow equation, and avalanche injection is modeled by generation of carriers due to electric field and current density. For high voltage power transistors, the program can take into account the fact that electric field distribution peaks at the base- collector junction or the n- n+ interface of n p n- n+ design, depending on the operating condition.

The steady-state electrical problem and the time dependent thermal problem are solved for a specified operating condition to establish its stability. The two- dimensional region of analysis (shown by diagonal lines in Fig. 1) can be represented by a number of one-dimensional transistors separated by resistors (Fig. 2). Emitter, base and collector currents for each transistor are obtained, assuming a constant temperature for a specified V(CE)/I(C) or V(CE)/V(BE) operating condition. Base current I(B) for each transistor is composed of three terms; I(BE) (current due to carriers injected into the emitter), I(BR) (current due to carrie...