Browse Prior Art Database

Determining Scan Ring Delays

IP.com Disclosure Number: IPCOM000088088D
Original Publication Date: 1977-Apr-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 24K

Publishing Venue

IBM

Related People

DiGrandi, R: AUTHOR

Abstract

Delays of individual elements in a scan ring can be determined by discriminately scanning 1's into strategic bit positions of the scan ring and then flushing them out and measuring the delay. The technique can be used for a scan ring of any length.

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Determining Scan Ring Delays

Delays of individual elements in a scan ring can be determined by discriminately scanning 1's into strategic bit positions of the scan ring and then flushing them out and measuring the delay. The technique can be used for a scan ring of any length.

As shown in the drawing, each element consists of a latch L and a trigger T. In order to scan data into a ring, the data must be presented to the "scan data in" input and then latched and triggered into position by activating the +A clock and then the -B clock, respectively. The +A clock and the -B clock are not normally activated simultaneously. Normally the +A clock is deactivated before the -B clock is activated, and vice versa. Each time the scan ring is latched and then triggered, the data moves from one position to the next succeeding position in the scan ring.

If the +A clock and the -B clock are activated simultaneously, then whatever data is presented to the "scan data in" will flush through to the "scan data out" (output of last stage). The time it takes to propagate data (0 or 1 level) from the scan data input to the scan data output can be directly measured with an oscilloscope or some other appropriate instrument. If we scan a 1 into the next- to-last bit position of the scan ring by latching and triggering the scan ring in its normal mode of operation, this 1 is also presented to the input of the last stage. Now if we activate the +A clock and the -B clock simultaneously, this...