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# Ripple Carry Hardware with One Device Delay per Stage

IP.com Disclosure Number: IPCOM000088099D
Original Publication Date: 1977-Apr-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 28K

IBM

## Related People

Hong, SJ: AUTHOR [+2]

## Abstract

By ripple carry, as well as no-carry, we achieve one transistor delay between successively higher carry-bit generation for the ripple-carry address.

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Ripple Carry Hardware with One Device Delay per Stage

By ripple carry, as well as no-carry, we achieve one transistor delay between successively higher carry-bit generation for the ripple-carry address.

Consider Addition: A: a(n) a(n - 1)....a(i)....a(2) a(1) B:+b(n) b(n -
1)....b(i)....b(2) b(1) C(n) C(n - 1)....C(i)....C(2) C(1) Carry (C(0) Carry In) S(n)
S(n- 1)....S(i)....S(2) S(1) Sum Let T(i) = a(i) b(i) and G(i) = a(i) b(i) for all i. We
know that: (1) whenever G(i) = 1, C(i) = 1. (2) whenever T(i) = 1, C(i) = 0; and (3) if G(i) = 0 and T(i) = 0 (G(i) T(i) = 1 never occurs), then the carry is 1, if the nearest right side 1 among G(j) or T(j) belonged to G(j) and 0 if the nearest right side i among G(j) or T(j) belonged to T(j).

This suggests that G(j)'s as well as T(j)'s propagate towards the higher digit. The a(i) Not = b(i) positions merely pass on the ripple carries. The implementation of this is shown in the figure. Operation: (1) If G(i) = 0 and T(i) = 0, Q(1) and Q(2) are high impedances, passing on the previous stage values. (2) If T(i) = 1 (or G(i) = 1, but never both 1) the corresponding Q(1) or Q(2) becomes a low impedance, forcing the correct carry values originating from i to the higher digit positions.

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