Browse Prior Art Database

Auto Initial Microprogram Load

IP.com Disclosure Number: IPCOM000088117D
Original Publication Date: 1977-Apr-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 8 page(s) / 327K

Publishing Venue

IBM

Related People

Houdek, ME: AUTHOR [+2]

Abstract

This circuit arrangement provides for automatic restoration of a computer system after a utility power failure has occurred. The automatic restoration of the computer system by initial microprogram load (IMPL) is particularly useful for unattended computer system operations, such as where the computer is connected as a host to a plurality of remote terminals. The remote terminals could be operated, for example, 24 hours a day but the computer might be attended by an operator for only eight hours.

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Auto Initial Microprogram Load

This circuit arrangement provides for automatic restoration of a computer system after a utility power failure has occurred. The automatic restoration of the computer system by initial microprogram load (IMPL) is particularly useful for unattended computer system operations, such as where the computer is connected as a host to a plurality of remote terminals. The remote terminals could be operated, for example, 24 hours a day but the computer might be attended by an operator for only eight hours.

A circuit arrangement for automatic restoration of a computer system is provided for computer systems with and without an uninterruptible power system (UPS). In either case the circuit arrangement requires that the utility power be up for a predetermined period of time before the computer power-up sequence is initiated. It stores an indication of whether the computer system powered down normally as by operator control or abnormally as by power failure. If the system powered down normally, it should not be automatically restarted. It also stores an indication as to whether the system was repowered automatically or by an operator.

The circuit arrangement in Fig. 1 is for automatic IMPL of a computer system (Fig. 2) without UPS. Initially, the computer system is powered up by turning on the power on switch on panel 25 (Fig. 2) to provide a signal to OR circuit 31 (Fig.
1) of Auto IMPL circuit 30 (Fig. 2). The AC utility power enters the AC Switching and Control circuit 10 which feeds power supplies 20 for I/O devices 35 and CPU 45 and power supply 15 for power controller 50. The output of OR circuit 31 provides a Start Power Up Sequence signal to power controller 50 for bringing up power supplies 20.

The Power On Switch signal also sets mechanical latch 32, which, for example, can be a relay having a mechanical detent. Mechanical latch 32 thus remains set in the absence of electrical power and requires a signal to be reset. The Power On Switch signal resets the Auto IMPL Status latch 35 and sets Counter Control latch 37 via OR circuit 36.

With the Auto IMPL Status latch 35 reset, the CPU 45 is informed that the system powered up normally. Latch 37 holds Logic Delay Counter 40 reset via OR circuit 38 and AND circuit 39. The CPU 45 thru microcode 46 senses that the Auto IMPL Status latch 35 is off and, after the operator provides initialization input, executes user programs.

A normal power shutdown can be initiated by the operator, a power fault or by the CPU 45 via microcode 46. The power shutdown signals are applied via OR circuit 33 to reset mechanical latch 32 and to power controller 50 to start a power-down sequence.

Mechanical latch 32 remains set when the utility power fails, and it provides an input to AND circuit 34 which also receives an Auto IMPL Switch signal if the system is in the Auto IMPL mode. AND circuit 34 also has an input from decode
41. Decode 41 provides a signal to AND circuit 34 after cou...