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Multidigit Decimal Addition and Subtraction

IP.com Disclosure Number: IPCOM000088127D
Original Publication Date: 1977-Apr-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Hicks, DR: AUTHOR [+3]

Abstract

Example 1 Example 2 (10) B = ADD B, `6666' (20) W3 = ADD W2, CARRY (11) C = XOR A, B (21) W1 = ADD W1, `66' (12) A = ADD A, B, (22) W2 = XOR W1, W2 (13) C = XOR A, C, (23) W3 = ADD W1, W3 (14) C = SRA C (24) W2 = XOR W2, W3 (15) C = NOR C, `7777' (25) SKIP ON DIGITCARRY (16) C = SRL C (26) W3 = SUB W3, `06' (17) A = SUB A, C (27) SKIP ON CARRY (18) C = SRL C (28) W3 = SUB W3, `60'. (19) A = SUB A,C. Example 1 shows an algorithm for the addition of two 16-bit binary-coded decimal (BCD) numbers in a 16-bit binary arithmetic unit. Registers A and B hold the arguments, the result being returned to A; C is a scratch register. The operations ADD, SUB, XOR and NOR represent full-width binary addition, subtraction, exclusive-OR and OR-complement, respectively.

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Multidigit Decimal Addition and Subtraction

Example 1 Example 2 (10) B = ADD B, `6666' (20) W3 = ADD W2, CARRY (11) C = XOR A, B (21) W1 = ADD W1, `66' (12) A = ADD A, B,
(22) W2 = XOR W1, W2 (13) C = XOR A, C, (23) W3 = ADD W1, W3 (14) C = SRA C (24) W2 = XOR W2, W3 (15) C = NOR C, `7777' (25) SKIP ON DIGITCARRY (16) C = SRL C (26) W3 = SUB W3, `06' (17) A = SUB A, C
(27) SKIP ON CARRY (18) C = SRL C (28) W3 = SUB W3, `60'. (19) A = SUB A,C. Example 1 shows an algorithm for the addition of two 16-bit binary- coded decimal (BCD) numbers in a 16-bit binary arithmetic unit. Registers A and B hold the arguments, the result being returned to A; C is a scratch register. The operations ADD, SUB, XOR and NOR represent full-width binary addition, subtraction, exclusive-OR and OR-complement, respectively. SRA is a single-bit shift right through a carry-out bit, while SRL shifts right with a zero fill bit. The symbol to the left of the equal sign indicates which register receives the result of each operation. Numbers in quotes represent hexadecimal literal (immediate) values.

Step 10 of Example 1 inserts a zero carry. In step 12, a previous carry is used if a multiple-precision addition is being performed; otherwise, the carry-in is ignored. Carry-out is always saved, and is shifted in at step 14. Step 15 isolates the carrys for each B:CD digit. Step 17 performs only half of the post-correction (sixes) correction; step 19 performs the other half. For BCD subtraction, step...