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IP.com Disclosure Number: IPCOM000088151D
Original Publication Date: 1977-Apr-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Bolton, DW: AUTHOR

Abstract

Instruction set mnemonics have generally a lower level of redundancy than natural language. So, for example, we may have LR 4,0 for "move the contents of register 0 to register 4' and LRI 4,0 for "put the value 0 in register 4'.

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Source Code Checking

Instruction set mnemonics have generally a lower level of redundancy than natural language. So, for example, we may have LR 4,0 for "move the contents of register 0 to register 4' and LRI 4,0 for "put the value 0 in register 4'.

Some operand values may have special significance, effectively modifying the operation in a radical manner.

To improve the clarity of such code it is common practice to use names for registers rather than numbers, and Assemblers generally provide a facility for declaring such literals and specifying the numeric interpretation they are to be given. In this way the intent of the code is made more immediately apparent: LR R04,R00 but LRI R04,0.

Unfortunately, there is not usually a facility for making the Assembler enforce the chosen conventions. Thus it may be that the coder intends LR R04,R00 but mistypes this as LRI R04,R00 which will be interpreted as LRI 4,0.

More seriously, at code review or in debugging, the human reader may well fail to notice the inconsistency and interpret it as the intended instruction, making the bug harder to find than it would have been if no convention has been adopted.

The objective, then, is to provide an automatic cross-check between the operations and the notation of the operands. Given an Assembler with a macro facility which allows macros of the same name as a mnemonic to take precedence, it is a simple matter to construct a macro library containing macros to replace all the mnemonic...