Browse Prior Art Database

Analog to Digital Converter

IP.com Disclosure Number: IPCOM000088252D
Original Publication Date: 1977-May-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 3 page(s) / 44K

Publishing Venue

IBM

Related People

Esteban, D: AUTHOR [+3]

Abstract

Shown in the drawing is a feedback analog-to-digital converter wherein the analog level, to which the signal to be converted is compared, is generated by a digital-to-analog converter under control of micro-programmed logic.

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Analog to Digital Converter

Shown in the drawing is a feedback analog-to-digital converter wherein the analog level, to which the signal to be converted is compared, is generated by a digital-to-analog converter under control of micro-programmed logic.

The converter comprises a comparator 1, receiving signal VIN to be converted on its first input. This signal is compared to an analog reference level VR applied on its second input. Depending upon the comparison result R, a "one" or a "zero" is provided on output 2 of the comparator, the "one" condition corresponding to VIN > VR and the "zero" condition corresponding to VIN < VR.

Successive analog reference levels are generated by digital-to-analog converter 3 which receives digital values provided by a read-only memory 4 through selection circuit 5. Under control of a microprogram, the instructions of which are applied through bus 6, two selected numbers having addresses stored in address register 7 are presented on output buses 8 and 9 of memory 4.

Circuit 5 comprises a gate 10 which, under control of signal R on line 2-a, transfers digital values on bus 8 or bus 9 to bus 11.

Bus 11 is connected to a set of XOR circuits 12, the output bus 13 of which is connected to buffer 14. Bus 15 connects the output of buffer 14 with the input of XOR circuits 12. Sign information generated by latch 16 is applied to buffer 14, which provides on bus 17 digital values that are converted into analog reference levels VR by converter 3. An N-bit parallel digital word corresponding to the analog signal VIN is provided on bus 18 at the end of the conversion process, and an N-bit serial digital word is provided on line 19.

The conversion process consists in successively testing digital values on bus 17 in the following way. During the first comparison cycle, digital value a(0), having the address Ao and corresponding to the zero reference level, is selected by the...