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Register Quadrant Move Instruction

IP.com Disclosure Number: IPCOM000088291D
Original Publication Date: 1977-May-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 25K

Publishing Venue

IBM

Related People

Atkins, JD: AUTHOR [+3]

Abstract

This article describes an instruction format that provides for transfer of registers both between register space and memory and between one location within a register space and another.

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Register Quadrant Move Instruction

This article describes an instruction format that provides for transfer of registers both between register space and memory and between one location within a register space and another.

The active general registers associated with a given process will be considered to be divided into quadrants, E(1), E(0), B(1), B(0) (Fig. 1). Quadrant pairs E(0), B(0) and E(1), B(1) each contain half of the active registers in the register space so designated. In each pair, the E quadrant and the B quadrant bisect the registers orthogonally in a manner such that any designated quadrant contains either the low-order half of each register in the pair or the high-order half of each register in an EB pair.

In environments utilizing a minicomputer engine, a requirement for the transfer of general registers between registers and memory often occurs. On interrupt-driven machines, the requirement for moving the entire contents of a set of general registers to storage may significantly increase interrupt latency and result in lower throughput for the system. An instruction detailed below provides an economical mechanism for accomplishing the necessary relocation of register contents without creating an interrupt latency difficulty of such severity.

The format for the Instruction is shown in Fig. 2. OPCODE identifies the instruction as REGISTER GROUP TRANSFER INSTRUCTION. The length of this field is implementation dependent and can be selected as desired. In Fig. 2, the C field contains one bit which determines whether the transfer is to be within the register space or between register space and memor...