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Application of Immersion Tin as an Etch Mask to Printed Circuit Lines

IP.com Disclosure Number: IPCOM000088395D
Original Publication Date: 1977-Jun-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Ruane, RE: AUTHOR

Abstract

In a conventional, additively plated printed-circuit board process where the additive plating produces circuit lines built up on very thin copper substrates adhered to a printed-circuit board substrate, such as shown in Fig. 1, it has been conventional to use some sort of an etch mask over the top of the circuit line prior to flash-etching to remove the unwanted thin copper substrate. For example, as shown in Fig. 1, once the circuit line 11 has been defined on the thin copper substrate 13 mounted on the printed-circuit board substrate 15, an immersion tin 17, for example, is placed as an etch mask on top of the circuit line 11 prior to the removal of the photoresist material (not shown).

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Application of Immersion Tin as an Etch Mask to Printed Circuit Lines

In a conventional, additively plated printed-circuit board process where the additive plating produces circuit lines built up on very thin copper substrates adhered to a printed-circuit board substrate, such as shown in Fig. 1, it has been conventional to use some sort of an etch mask over the top of the circuit line prior to flash-etching to remove the unwanted thin copper substrate. For example, as shown in Fig. 1, once the circuit line 11 has been defined on the thin copper substrate 13 mounted on the printed-circuit board substrate 15, an immersion tin 17, for example, is placed as an etch mask on top of the circuit line 11 prior to the removal of the photoresist material (not shown). Then, after the photoresist material is removed, the entire surface is treated to a flash-etching procedure which removes the unwanted portions of the thin copper substrate 13. However, at the same time this causes an erosion of the side walls of the circuit line 11, as indicated by the dotted lines in Fig. 1.

A process to eliminate this erosion problem is illustrated in Figs. 2 and 3. The circuit line 11 is surrounded by the photoresist 19 after the circuit line 11 has been developed on the thin copper substrate 13. Prior to removing the photoresist 19, the photoresist is subjected to a low temperature soak which causes the resist 19 at the interface between the plated copper and the thin copper base to be up...