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Dynamic Compare Delay for Print Hammers

IP.com Disclosure Number: IPCOM000088403D
Original Publication Date: 1977-Jun-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 4 page(s) / 24K

Publishing Venue

IBM

Related People

Gregory, FA: AUTHOR [+5]

Abstract

In a printer in which all type characters continuously and sequentially pass each print position, a fired print hammer may not have settled out sufficiently before being fired again, either for an adjacent position or the next line. Adequate settling can be assured by requiring a minimum elapsed time before a subsequent energization.

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Dynamic Compare Delay for Print Hammers

In a printer in which all type characters continuously and sequentially pass each print position, a fired print hammer may not have settled out sufficiently before being fired again, either for an adjacent position or the next line. Adequate settling can be assured by requiring a minimum elapsed time before a subsequent energization.

Referring to Fig. 1, the signals, as taken from an IBM Type 3211/3811 printer, identified as Print Scan Start (PSS) (line a), Hammer Settle Delay (line b) and Print Trigger (line c) occur regularly during printer operation. As an example of a print operation, assume the hammer in position 10 fires in the last print scan 48 for print line No. 1. The Print Trigger stays on for three extra scans during which time the last hammer fired would be turned off after 2 1/2 print scans. After all hammers for print line No. 1 have fired, a Carriage Go After Print signal turns the Hammer Settle Delay on for the next 19 PSS pulses. When the Hammer Settle Delay goes off, the Print Trigger for line No. 2 comes up. This signal allows the hammer to be fired in the first print scan with an insufficient settling time of 19 PSS pulses.

Additional selective settling time can be obtained by adding Dynamic Compare Delay (DCD) logic to block the Print Compare signal for additional PSS pulses, as desired. The logic provides a DCD Buffer with four binary bits for each print hammer position. Each time a print hammer position is addressed by the Print Line Buffer (PLB) Address Ring, a corresponding position in the DCD Buffer (line d) is addressed and its contents are read out and incremented by 1. When the first Print Compare signal for the hammer occurs, the DCD Buffer reads out a decimal value 15 and the All 'One' Dec 15 Signal (line e) is generated to allow the Print Compare to fire the hammer. At WRITE time, the DCD buffer has a decimal value 9 written from preset switches into the corresponding storage address for that print position. The DCD Buffer is then disabled during Hammer Settle Delay, and when hammer position 10 is next addressed for line No. 2, decimal value 9 is read out and 6 PSS pulses are required before the All 'One' Dec 15 Signal is generated.

The Dyanmic Compare Delay Logic circuit is shown in more detail in Fig. 2 and is related to the timing diagram shown in Fig. 3. The main functional block of the logic is DCD Buffer 10 with four bits for each hammer. The buffer is operated by eight PLB Address Lines, a Gated Buffer Enable signal, and a READ/WRITE (R/W) signal. A four bit Data-In Bus 11 and a four bit Data-Out Bus 12 are also connected to the buffer. The circuit includes four-bit Binary Counter 13 which has an input from both Data-Out Bus 12 and four manual DCD Counter Switches 14 which can be set as desired. The output of Binary Counter 13 is fed to Data-In Bus 11 of Buffer 10, and the Data-In Bus is also connected to the All 'One' Decimal 15 signal AND circuit 15,...