Browse Prior Art Database

Performance Monitor

IP.com Disclosure Number: IPCOM000088508D
Original Publication Date: 1977-Jun-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 71K

Publishing Venue

IBM

Related People

Maholick, AW: AUTHOR [+3]

Abstract

In communication processors critical time dependent hardware measurements are usually made with external test equipment attached to the machine under test via test probes. This arrangement is cumbersome since it requires bulky equipment very often in a limited space.

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Performance Monitor

In communication processors critical time dependent hardware measurements are usually made with external test equipment attached to the machine under test via test probes. This arrangement is cumbersome since it requires bulky equipment very often in a limited space.

This article describes a relatively efficient sampling approach which, due to its simplicity and low cost, can be provided as a built-in feature to thereby provide performance information on a continuous basis.

The sampling mechanism provides for sampling a plurality of signals, some of which occur on a mutually exclusive basis and some of which occur independently. When a signal is active at the sample time, a storage location in random-access memory 1 will be incremented by a microprocessor 2 in accordance with the chart shown at the top of Fig. 1. Means to initialize the storage locations to zero, and start and stop the sampling process, are not shown.

The sampling mechanism employs two modes of operation. The first to be described is for the mutually exclusive functions, one of which is always active. When scan counter 3 position 1 is off, the address of one of the four mutually exclusive functions A, B, C, D will be forced on the memory address bus 5 to access the storage location to be incremented by means of the AND/OR circuitry 6 to 10. The increment memory latch 13 will be set by scan counter position 1 being off. The increment memory latch being on will cause the micropr...