Browse Prior Art Database

Buffer Prefix and Command Word Merge

IP.com Disclosure Number: IPCOM000088509D
Original Publication Date: 1977-Jun-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 20K

Publishing Venue

IBM

Related People

Schick, T: AUTHOR

Abstract

This article describes a Process Control Block (PCB) for use in a programmed communication controller environment which reduces the processing associated with two conventional lists to that of a single list.

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Buffer Prefix and Command Word Merge

This article describes a Process Control Block (PCB) for use in a programmed communication controller environment which reduces the processing associated with two conventional lists to that of a single list.

The PCB comprises a merging of the conventional buffer prefix word and command word (CW). The "length-of-data" field in the conventional buffer prefix is functionally identical to the "count" field in the CW. The "offset-to-data" field in the buffer prefix is functionally identical to the "address" field in the CW. And the "address-of-next-buffer" field in the buffer prefix is functionally identical to the "next-CW-address" field in the Transfer I in Channel (TIC) CW. In addition to the merged fields, several other fields are added in the PCB illustrated in the drawing.

The PCB, functioning as the buffer prefix, permits the hardware (interfaced between the processor and a line) to process multiple buffers without interrupting the processor control program. This capability significantly reduces the overrun problem and, in addition, relieves the Control Program (CP) of the buffer management processing function.

The PCB contains several new fields illustrated in the drawing. The status field permits the hardware to perform interrupt stacking and the Interrupt Service Request (ISRS) points to the next PCB in the chain which contains status information.

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