Browse Prior Art Database

Fixed Head Reference Pulse Compensation

IP.com Disclosure Number: IPCOM000088521D
Original Publication Date: 1977-Jun-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Killorn, RL: AUTHOR [+2]

Abstract

In disk files having both fixed and movable heads, the movable heads being positioned by means of a ganged movable servo head in relation to prewritten servo patterns on a dedicated servo disk, a tolerance problem arises in the detection of index marks, typically occurring once per revolution, in the servo pattern. Tolerance differences exist between the access path of the movable heads and the access path of the servo-writer head which wrote the original servo and index information. If either or both of these paths deviate from a true radial path by a small amount, the index marks will be read at different angular positions for different radial positions of the movable heads.

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Fixed Head Reference Pulse Compensation

In disk files having both fixed and movable heads, the movable heads being positioned by means of a ganged movable servo head in relation to prewritten servo patterns on a dedicated servo disk, a tolerance problem arises in the detection of index marks, typically occurring once per revolution, in the servo pattern. Tolerance differences exist between the access path of the movable heads and the access path of the servo-writer head which wrote the original servo and index information. If either or both of these paths deviate from a true radial path by a small amount, the index marks will be read at different angular positions for different radial positions of the movable heads. Since the servo and movable data heads are ganged together, no timing problem arises, but in the case of fixed-head data, the time of index is variable with respect to the data on the fixed-head tracks.

The drawing shows a circuit for selecting one of a number of progressively delayed sequences of input pulses in dependence on the current contents of the cylinder address register (CAR). The detected index mark is applied to a digital delay unit 1, such as a shift register on line 2. The unit also receives high frequency clock pulses on line 3 to produce index pulse trains, delayed by different amounts, on lines 4. Each delayed pulse train is applied to a respective AND gate 5. A memory 6 is responsive to the contents of cylinder address register 7 to...