Browse Prior Art Database

Programmable Logic Array With Provision for Interrupts

IP.com Disclosure Number: IPCOM000088714D
Original Publication Date: 1977-Jul-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Eggebrecht, LC: AUTHOR [+2]

Abstract

Programmable logic arrays (PLAs) are commonly used in digital controllers, and especially for microinstruction sequencing in digital computers. Frequently, such applications require that one task be interrupted while a higher-priority task is performed. The interrupted task must then resume at the point where it was suspended.

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Programmable Logic Array With Provision for Interrupts

Programmable logic arrays (PLAs) are commonly used in digital controllers, and especially for microinstruction sequencing in digital computers. Frequently, such applications require that one task be interrupted while a higher-priority task is performed. The interrupted task must then resume at the point where it was suspended.

PLA 10 (Fig. 1) has an "AND" array 11 which receives external inputs 12 and feedback inputs 13. An "OR" array 14 produces output signals 15, some of which may be used as feedback signals 13. PLA 10 can be made interruptible if the external and feedback inputs 12 and 13 for the current cycle can be stored to preserve the next state of the controller. Storage array 20 has a number of words, each wide enough to hold one set of inputs 21. Different words are selected by address lines 30, which carry a code representing a specific interrupt level. Similarly, storage array 40 holds feedback signals 13 in words addressed by lines 30. Thus, the words at any address of storage modules 20 and 40 represent the information required to return to a particular level after an interrupt.

A complication arises, in that feedback signals 13 usually represent inputs to a set of JK latches, rather than D-type (polarity-hold) elements from which storage arrays are constructed. Fig. 2 shows how array 40 may be made to imitate sets of addressable JK latches with conventional storage array 42. This is achieved w...