Browse Prior Art Database

Latent Images in Charge Storage Memories

IP.com Disclosure Number: IPCOM000088816D
Original Publication Date: 1977-Aug-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Furlong, RJ: AUTHOR [+3]

Abstract

A latent image memory, for example, as disclosed in U. S. Patent 3,662,351, employs an array of otherwise symmetrical cells intentionally fabricated to be slightly asymmetrical. When power is first applied to this array, the slight asymmetry causes the cells of the array to power up in a preprogrammed pattern. From the preprogrammed pattern, the stored data can be altered by normal random-access memory operation.

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Latent Images in Charge Storage Memories

A latent image memory, for example, as disclosed in U. S.

Patent 3,662,351, employs an array of otherwise symmetrical cells intentionally fabricated to be slightly asymmetrical. When power is first applied to this array, the slight asymmetry causes the cells of the array to power up in a preprogrammed pattern. From the preprogrammed pattern, the stored data can be altered by normal random-access memory operation.

More recently developed memories, such as those employing charge store cells disclosed in U. S. Patent 3,979,734 and in the IBM Technical Disclosure Bulletin, Vol. 19, No. 11, April 1977, pages 4103-4105, are not symmetrical in the sense of a flip-flop circuit and, as such, cannot be made asymmetric. To provide latent images in the charge storage memories, the storage capacitors of certain predetermined cells are made leaky intentionally, but not sufficiently leaky to make them lose information within a normal refresh cycle or period. To produce such leaky cells, the capacitors of the predetermined cells are first implanted with ions of an inert species, such as argon, and then with a metal to thus provide an unannealable controlled defect. When power is initially applied to an array of these cells, a clock pulse sequence first charges all cells in the array, and then a refresh operation is begun after a time period longer than the normal refresh cycle or period. In some of these memory arrays mere application of...