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Browse Prior Art Database

Polysulfone Lift Off Masking Technique

IP.com Disclosure Number: IPCOM000088837D
Original Publication Date: 1977-Aug-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Fredericks, EC: AUTHOR [+3]

Abstract

This masking technique is for forming interconnection metallization, and the like, on a semiconductor device structure or a dielectric layer, such as polyimide, SiO(2), Si(3)N(4) and Al(2)O(3).

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Polysulfone Lift Off Masking Technique

This masking technique is for forming interconnection metallization, and the like, on a semiconductor device structure or a dielectric layer, such as polyimide, SiO(2), Si(3)N(4) and Al(2)O(3).

Onto a semiconductor substrate 10 (Fig. 1) a layer 12 of polysulfone polymer resin is applied and cured at 300 Degrees C on a hotplate. A barrier layer 14 is then deposited on top of the polysulfone layer 12. The barrier layer 14 can be a thin film of evaporated Si or a layer of methylsiloxane resin. Next, a pattern 18 is defined by applying resist layer 16, and using conventional lithography techniques (either E-beam or optical).

The pattern is etched in the underlying layers by reactive ion etching first in a CF(4) plasma to etch through the barrier layer 14 and then in an O(2) plasma to etch through the polysulfone layer 12 (Fig. 2). A 10-second dip in 10:1 buffered Hf is used to remove the residue remaining from the reactive ion etch. A layer 20 of Al or other metal is blanket-deposited on the surface to the desired thickness (Fig. 3). The polysulfone lift-off structure and overlying metal are then removed in ultrasonic n-methyl pyrrolidone in fifteen minutes, leaving the metallization pattern 20 (Fig. 4).

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