Browse Prior Art Database

High Speed Allocation of a Storage Area

IP.com Disclosure Number: IPCOM000089038D
Original Publication Date: 1977-Sep-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 57K

Publishing Venue

IBM

Related People

Boggs, JK: AUTHOR [+2]

Abstract

The allocation of storage in today's computing systems is a high activity function, typically performed in software, and generally requires considerable overhead in processing time. A mechanism has been provided to minimize this allocation overhead in a manner where the unit of allocation can be as small as a single byte of storage and as large as desired.

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High Speed Allocation of a Storage Area

The allocation of storage in today's computing systems is a high activity function, typically performed in software, and generally requires considerable overhead in processing time. A mechanism has been provided to minimize this allocation overhead in a manner where the unit of allocation can be as small as a single byte of storage and as large as desired.

Each storage area set which is to be managed has a bit associated with it which indicates the status of the location. This bit, identified as the R bit, is equal to 1 when the storage area set is free, and is equal to 0 when the storage area set is in use or is not free.

Two functions, as indicated in Fig. 1, are defined to allow software access to the mechanism. The first instruction is the Allocate A Free Storage Set (AFSS), and the second instruction is Free A Storage Set (FASS). The R bits from the storage sets to be controlled are input to the logic elements identified as the LOCATE and COMBINE logic units, the outputs of these logics being an F bit and a set of L bits. The F bit specifies when, at least, one storage area within the controlled set is available, and the L bit or bits provide the address of the storage location which is available.

The AFSS instruction interrogates the F bit of the address storage area to determine if the area is available. If the F bit is 0, no area is available, and the instruction then returns an error indication indicating the nonavailability. If the F bit is 1, then the L bits are used to address the single R bit and...