Browse Prior Art Database

Dual Function Diskette Control

IP.com Disclosure Number: IPCOM000089040D
Original Publication Date: 1977-Sep-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 3 page(s) / 47K

Publishing Venue

IBM

Related People

Mitchell, MJ: AUTHOR

Abstract

A Dual Function Diskette Control (DFDC) allows one attached device to serve two functions: that of a standard diskette device and that of a load/dump device. The key assumption is that these operations can be mutually exclusive from a user standpoint; that is, the attached device either has stacks loaded that contain standard formatted diskettes, or contains stacks that are used for load/dump.

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Dual Function Diskette Control

A Dual Function Diskette Control (DFDC) allows one attached device to serve two functions: that of a standard diskette device and that of a load/dump device. The key assumption is that these operations can be mutually exclusive from a user standpoint; that is, the attached device either has stacks loaded that contain standard formatted diskettes, or contains stacks that are used for load/dump.

Referring to the figure, the DFDC communicates with the System channel interface on one side, and it controls the attached device on the other side. The interface to the System channel accepts standard diskette device commands or load/dump device commands, and executes them in a program transparent fashion from the standpoint of the System. The DFDC consists of a microprocessor and hardware logic. Although the Control Store of the microprocessor contains the total code for standard diskette emulation and load/dump, it is characterized as one device at a time. To the System, the DFDC appears as two separate, unrelated I/O devices with different I/O characteristics and different I/O device addresses. For one operation, the user would define a specific device address, 'F0', for example, as a standard diskette device. For load/ dump operation, the user would define 'F1', for example, as a load/dump device. Programs using these devices would then use the assigned addresses. As specified earlier, the two modes of operation must be mutually exclusive in time, and this responsibility is placed on the user(s).

If the System processor instruction stream inadvertently attempts to use both device addresses, in the same timeframe, an enforcement technique is used to accept one device address while the second device address is rejected. This method employs a plug card and two way switch the control unit. At installation time, the plug card is wired with the high order seven bis of the desired device addresses. The low order bit is taken from the customer-accessible two way switch. One switch position specifies a "0" bit as the low order position of the device address, and by convention this switch position is marked "standard diskette mode". The second switch position specifies a "1" bit as the low order position of the device address, and this position is marked "load/dump". An even/odd pair of addresses is always utilized. At "System Generation" time, then, these device address assignments ar...