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Extending the Minimal Dimensions of Photolithographic Integrated Circuit Fabrication Processing

IP.com Disclosure Number: IPCOM000089050D
Original Publication Date: 1977-Sep-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 3 page(s) / 112K

Publishing Venue

IBM

Related People

Abbas, SA: AUTHOR [+3]

Abstract

This article describes a method which extends conventional photolithographic masking definition techniques beyond their present limitations. At present, masks cannot be made by conventional photolithographic techniques if the smallest lateral dimensions required are below 2.5 to 3 microns. Below these dimensions, consistent resolution cannot be obtained, i.e., there is little control of the dimensions. The present method extends such conventional photolithographic definition techniques to lines having dimensions below 2 microns. In general, this is achieved by using polysilicon masking layers which are made into masks by first using an intermediate mask of oxidation blocking material, such as silicon nitride, in the formation of the polysilicon.

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Extending the Minimal Dimensions of Photolithographic Integrated Circuit Fabrication Processing

This article describes a method which extends conventional photolithographic masking definition techniques beyond their present limitations. At present, masks cannot be made by conventional photolithographic techniques if the smallest lateral dimensions required are below 2.5 to 3 microns. Below these dimensions, consistent resolution cannot be obtained, i.e., there is little control of the dimensions. The present method extends such conventional photolithographic definition techniques to lines having dimensions below 2 microns. In general, this is achieved by using polysilicon masking layers which are made into masks by first using an intermediate mask of oxidation blocking material, such as silicon nitride, in the formation of the polysilicon.

With reference to Figs. 1A - 1D, a silicon substrate 10 is covered with an insulating material 11, such as silicon nitride. A layer of polycrystalline silicon 12 is formed thereon, and this layer is covered with a layer of silicon nitride 13. Then, utilizing conventional photolithographic integrated-circuit etching techniques, a silicon nitride is first formed into a mask 13' which is used to define regions 12' of the polycrystalline silicon. Assuming that the conventional photolithographic masking techniques used to form regions 12' have been utilized to the limits of their resolution, then regions 12' will have lateral dimensions in the order of from 2.5 to 3 microns.

Then, as shown in Fig. 1C, if the structure is subjected...