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High Performance Complementary Bipolar Transistors

IP.com Disclosure Number: IPCOM000089065D
Original Publication Date: 1977-Sep-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 4 page(s) / 92K

Publishing Venue

IBM

Related People

Jambotkar, CG: AUTHOR

Abstract

A process for fabricating integrated circuits composed of high performance complementary bipolar transistors may be understood with reference to Figs. 1A-7A and 1B-7B and the following description.

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High Performance Complementary Bipolar Transistors

A process for fabricating integrated circuits composed of high performance complementary bipolar transistors may be understood with reference to Figs. 1A-7A and 1B-7B and the following description.

1. 0n an Ntype silicon wafer substrate 1 of 0.01-0.001 ohm-cm resistivity, grow N- type epitaxial silicon 2 of 0.5-1.5 ohm-cm resistivity and about 10 mu m thickness.

2. Deposit 5-10K angstroms thick pyrolytic silicon dioxide 3 and 12-16 mils thick polysilicon 4 on top of the epitaxial silicon 2.

3. Through electrochemical etching, etch away the Ntype substrate 1. Then, through chemical etching, etch away about 8.5 mu m thick portion of the N- type epitaxial silicon 2. Flip the wafer upside down at this stage, all processing chat follows being done at the new top surface.

4. Grow about 1 mu m thick thermal silicon dioxide, and etch it away. At the end of this oxide growth, a 1 mu m thick layer of epitaxial silicon 2 is left on top of the silicon dioxide 3.

5. Grow about 3K angstroms thick thermal silicon dioxide 5.

6. Using photoresist 6 as a mask, selectively introduce a P- type impurity 8, such as boron, through ion implantation. This implantation is preferably done using energy suitable for realizing an R(p) = 0.5 mu m. R(p) is the distance from the silicon surface during ion implantation that the peak concentration occurs.

7. Strip away the remnant photoresist 6 and diffuse the P- type impurity 8 at an elevated temperature of about 1000 degrees C.

8. Through photolithography, etch the silicon dioxide 5 selectively.

9. Deposit an N type impurity 11, preferably phosphorus, in the exposed silicon regions, and diffuse it in for a suitably short period of time using an inert atmosphere.

The representative cross-sections of the silicon wafer at the end of process steps 2, 6 and 9 above are shown in Figs. 1A/B-3A/B, respectively.

10. Through photolithography, etch further the silicon dioxide 5 selectively.

11. Deposit a P type impurity 13, such as boron, in the exposed silicon regions. Diffuse in all impurities for a suitable period of time using an inert atmosphere.

12. Deposit about a 2K angstroms layer of silicon nitride 14; then etch it selectively using photolithography and, preferably, reactive ion etching.

13. Using photolithography, etch further the silicon dioxide 5 selectively.

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14. Deposit an Ntype impurity 17 in the exposed silicon regions. Diffuse in all impurities for a suitable period of time using an inert atmosphere.

15. Using photolithography and preferably reactive ion etching, etch further the silicon nitride 14 selectively.

16. Deposit about a 1 Um thick film of metal 20, such as aluminum, and etch interconnection pattern...