Browse Prior Art Database

Single Shot Circuit Implemented in Large Scale Integration

IP.com Disclosure Number: IPCOM000089096D
Original Publication Date: 1977-Sep-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Klara, WS: AUTHOR

Abstract

This is a circuit for providing a single-shot capability in large-scale integration (LSI) without using a capacitance and with a minimum number of components.

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Single Shot Circuit Implemented in Large Scale Integration

This is a circuit for providing a single-shot capability in large-scale integration (LSI) without using a capacitance and with a minimum number of components.

Conventional single-shot circuits are implemented with resistance/ capacitance combination circuits to provide an RC time constant which will delay turn-off times and, thereby, increase pulse widths. In the circuit illustrated in the drawing, a minimum number of components including a flip-flop (FF1), an AND gate, and a Divide By "N" Counter provide the single-shot function.

A pulse at input terminal A sets flip-flop 1 to provide an output at node B. This same signal enables the AND gate, and allows system clock pulses to enter the counter by means of line C. After N pulses, an output from the counter on line D resets flip-flop 1, ending the duration of the output pulse (width) at terminal
B. This also disables the AND gate and resets the counter through line R, thus making the system ready for the next input pulse.

In this manner, a minimum number of components provide a pulse width that is precisely controllable by the number set in the counter. Long pulses which would require long RC time constants that are difficult to obtain in most integrated circuits are readily provided.

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