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Browse Prior Art Database

Pedestal Clamp

IP.com Disclosure Number: IPCOM000089098D
Original Publication Date: 1977-Sep-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Vicary, CE: AUTHOR

Abstract

This is a layout for a semiconductor integrated circuit implementing a pedestal clamp for improving the performance of circuits on a semiconductor circuit chip.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 85% of the total text.

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Pedestal Clamp

This is a layout for a semiconductor integrated circuit implementing a pedestal clamp for improving the performance of circuits on a semiconductor circuit chip.

In a large-scale integrated circuit, delays in some circuit nets become more critical than others. In order to reduce the delay in such critical nets, a clamp circuit of the type illustrated in the drawing will limit the voltage swing of logic signals in such critical nets, thereby reducing delay. The clamp circuit is implemented by transistors T1 and T2 where the connection between two logic blocks is also connected to terminal A of the clamp. The emitter of T1 is connected to the collector of T2, which is a Schottky-clamped transistor. Terminals VCC and VRE are connected to bias the transistor T2 in order to establish the desired clamping level.

Transistor T1 is formed in the semiconductor substrate with collector (c), emitter (e) and base (b) regions as shown. Reference "S" refers to the Schottky contact. Terminal A is connected to the collector of T1, as illustrated by the dotted wiring path, and, also, to the base of T1. Similarly, the emitter of T1 is connected by the metal path, indicated by dotted line, to the collector of T2. Further, in the layout of transistor T2 note the emitter (e), base (b) and Schottky
(S) contact regions. The emitter of T2 is connected to voltage source pad VRE by the illustrated metal line. Terminal VCC is connected to one end of resistor
(R) while the othe...