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Design Technique for Array Logic Personalization

IP.com Disclosure Number: IPCOM000089134D
Original Publication Date: 1977-Sep-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Benedict, MK: AUTHOR [+3]

Abstract

In the drawing each block represents a unique state of a data channel or other logic and storage device of a data processing system. A state corresponds to a particular pattern of controlling signals to the logic gates of the device or, equivalently, a particular pattern of outputs from a programmable logic array (PLA) that supplies these controlling signals. Thus, a state also corresponds to a primitive operation of the device, such as transmitting a status message from a data channel to an associated processor.

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Design Technique for Array Logic Personalization

In the drawing each block represents a unique state of a data channel or other logic and storage device of a data processing system. A state corresponds to a particular pattern of controlling signals to the logic gates of the device or, equivalently, a particular pattern of outputs from a programmable logic array (PLA) that supplies these controlling signals. Thus, a state also corresponds to a primitive operation of the device, such as transmitting a status message from a data channel to an associated processor.

As shown in the drawing states 1 and 2 can be entered by operations that are represented by arrowed lines in the drawing that have the legend "operation". An example of such an operation is initially turning on the power of the device. States 2, 3 and 4 can be entered from preceding states. Arrowed lines in the drawing that have the legend "condition" show that the transition from one state to another takes place when a particular condition within the device has occurred. The states represent stable conditions of the device and a device remains in a given state until a particular condition occurs to produce a transition to a next state. The conditions that produce a transition can be stated as a logical sum of logical products. Array logic devices commonly are organized to perform a sum of products logic operation, and when the system states have been analyzed by the technique illustrated by the drawing, t...