Browse Prior Art Database

Process for Fabrication of Buried Emitter Transistors

IP.com Disclosure Number: IPCOM000089180D
Original Publication Date: 1977-Sep-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Ning, TH: AUTHOR [+3]

Abstract

Buried emitter merged transistor structures can be fabricated using ion-implantation masking with tungsten and penetration depth control with oxide. The resulting structure has a higher beta and f(T). The process is shown in the drawing.

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Process for Fabrication of Buried Emitter Transistors

Buried emitter merged transistor structures can be fabricated using ion- implantation masking with tungsten and penetration depth control with oxide. The resulting structure has a higher beta and f(T). The process is shown in the drawing.

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