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Low Bit Rate Speech Coding System using a Low Cost Stack Architecture Microprocessor

IP.com Disclosure Number: IPCOM000089191D
Original Publication Date: 1977-Sep-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 3 page(s) / 53K

Publishing Venue

IBM

Related People

Das, SK: AUTHOR [+4]

Abstract

The trend toward digital storage and transmission of speech is continuing due mainly to the increased speed and lower cost of digital computation. Recent work [*] has demonstrated that high quality, 20-30 kbit/sec speech can be produced using a technique called Adaptive Differential Pulse Code Modulation (ADPCM). However, a drawback to the widespread use of ADPCM has been the cost of the encoder/decoder system. In addition, even the cost of a flexible development system for real-time coders has been high.

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Low Bit Rate Speech Coding System using a Low Cost Stack Architecture Microprocessor

The trend toward digital storage and transmission of speech is continuing due mainly to the increased speed and lower cost of digital computation. Recent work [*] has demonstrated that high quality, 20-30 kbit/sec speech can be produced using a technique called Adaptive Differential Pulse Code Modulation (ADPCM). However, a drawback to the widespread use of ADPCM has been the cost of the encoder/decoder system. In addition, even the cost of a flexible development system for real-time coders has been high.

A system is described which is based upon a readily available, standard stack architecture microprocessor and uses the ADPCM technique.

Fig. 1 shows the development system for testing ADPCM algorithms. The CPU 1 and STACK 2 are a single microprocessor chip. The control and raw coefficient store reside in the read-only memory (ROM) 3. A/D converter 4 and D/A converter 5 are connected as shown.

Data sampled at 8-10 kHz with an 8 bit/sample quantization are read in by the CPU. All processing, in order to be real-time, must be performed between the taking of input speech samples. A synchronous procedure is used for maximum efficiency. In conventional, slow microprocessors, this realtime requirement is a severe limitation.

In the development system, both encoding and decoding must be done in real-time. Output samples are produced at the same rate and quantization as the input, but these have effectively gone through the encoding/decoding process.

The encoding/decoding system includes the same configuration as that shown in Fig. 1 at the respective encoding and decoding portions of the system.

At initialization, an ADPCM table is expanded from data in ROM and written in the stack in the form of the scratch pad table shown in Fig. 2.

ADPCM looks at the difference between a new sample and the last estimate. This differ...