Browse Prior Art Database

Cross Coupled Flip Flop

IP.com Disclosure Number: IPCOM000089199D
Original Publication Date: 1977-Sep-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 3 page(s) / 28K

Publishing Venue

IBM

Related People

Anacker, W: AUTHOR

Abstract

The flip-flop shown in the above figure consists of two nonlatching NOR circuits which are cross-coupled and utilize devices capable of carrying Josephson current. The flip-flop is DC powered and provides True (T) and Complement (C) outputs from a pair of Set (S(1);S(2)) and a pair of Reset (R(1);R(2) ) inputs. When interferometers are utilized for the devices capable of carrying Josephson current, the flip-flop requires only one unit of control current (e.g., either in S(1) or S(2)) for switching, and cross coupling can be achieved by a single wide control line.

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Cross Coupled Flip Flop

The flip-flop shown in the above figure consists of two nonlatching NOR circuits which are cross-coupled and utilize devices capable of carrying Josephson current. The flip-flop is DC powered and provides True (T) and Complement (C) outputs from a pair of Set (S(1);S(2)) and a pair of Reset (R(1);R(2) ) inputs. When interferometers are utilized for the devices capable of carrying Josephson current, the flip-flop requires only one unit of control current (e.g., either in S(1) or S(2)) for switching, and cross coupling can be achieved by a single wide control line.

The above circuit consists of Josephson interferometer devices J1, J2 connected in series with a control line portion CL3. Devices J1, J2 are shunted by an impedance Z1 and a transmission line having an output control line portion T, one side of which is connected to a node N1, the latter being connected to control line portion CL3. A similar circuit consisting of Josephson interferometers J3, J4 is disposed in series with a control Vine portion CL2, which is electromagnetically coupled to device J2. Control line portion CL2 is connected to node N1. Devices J3, J4 are shunted by an impedance Z2 which is connected to node N1 via an output control line portion C. Device J1 has a pair of Set inputs S1, S2. Similarly, device J4 has Reset inputs R1, R2. Impedances Z1, Z2 are resistances equal to the characteristic impedance of their associated transmission lines, and each resistance has a value which is sufficiently small to make devices J1, J4 self-resetting.

Prior to the application of any inputs, the flip-flop figure will provide one of the two possible outputs at T or C depending on the circuit parameters involved. Assuming that current is flowing in control line portion CL3, device J3 is switched to the voltage state, and an output appears at output control line portion C which is the complement of the input applied to device J1.

In operation, assuming that an input is applied to control line S1 of device J1, device J1 switches to the voltage state and the input current IDC, which initially flowed through devices J1, J2, control line portion CL3, node N1, output...